General Summary
Qualcomm is a technology leader pushing the boundaries to enable next-generation experiences and drive digital transformation for a smarter, connected future. As a Qualcomm Hardware Engineer, you will design, optimize, verify, and test electronic and mechanical systems—including Digital / Analog / RF / optical circuits, packaging, test systems, FPGA, and DSP systems—to deliver cutting-edge products. You will collaborate across teams to meet performance goals and product requirements.
Minimum Qualifications
- Bachelor's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field with 3+ years of hardware engineering experience,
- OR
- Master's degree with 2+ years of experience,
- OR
- PhD with 1+ year of experience.
Role : IPPD Physical Design Engineer
You will engage in physical implementation activities for high-performance CPU cores at advanced technology nodes (16 / 14 / 7 / 5 nm or below), including some or all of :
Floor-planningPlace and RouteClock Tree Synthesis (CTS)Formal VerificationPhysical Verification (DRC / LVS)Low Power VerificationPower Delivery Network (PDN)Timing ClosurePower OptimizationRequired Skills and Experience
Hands-on experience with physical design implementation of performance, power, and area (PPA) critical cores.Expertise in timing convergence of high-frequency, data-path intensive cores and advanced static timing analysis (STA) concepts.Proficient in block-level place-and-route convergence using Synopsys ICC2, Cadence Innovus, and timing closure using PTSI / Tempus on latest technology nodes.Solid understanding of clocking architecture.Familiarity with scripting languages such as Tcl, Python, or Perl for automation tasks.Strong problem-solving skills, good communication, and effective teamwork capabilities.Ability to collaborate with design, DFT, and PNR teams to resolve issues related to constraints validation, verification, STA, and physical design.Skills Required
Python, Dsp, Perl, Physical Design, Tcl, hardware engineering