Sr Principal Design Engineer

Job description

• Define the DFT Architecture for the next generation SoCs.
• Implementation & verification including Scan, PMBIST, JTAG and other DFT s related logic.
• Define and develop methodology for DFT insertion, pattern development, manufacturing tests, verifications, etc
• Working closely with cross functional teams to develop and verify DFT s structures and constraints.
• Perform RTL and gate level (no-timing and timing) simulations to verify DFT functionality.
• Work closely with Test Engineering for test program development and Silicon bring up, diagnosis, Yield improvement, etc.
• Work closely with EDA RnD teams to propose and implement new features.

Requirements  :

Role :   Product Design Engineer

Industry Type :   IT Services & Consulting

Department :   Engineering - Hardware & Networks

Employment Type :   Full Time, Permanent

Role Category :   Hardware

Education

UG :   Any Graduate

PG :   Any Postgraduate

Key Skills

ASIC JTAG DFT SOC RTL coding Verilog atpg Perl IEEE Python

Skills Required

Software, Python