Principal Design Engineer

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

• BE / BTech / ME / MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer.
• 8+ years of Design Verification experience with SV / UVM
• Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must.
• Design Verification experience verifying complex designs and leading projects from concept to verification closure.
• Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required.

Prior experience in IP verification of memory IP (DDR / HBM / GDDR) would be an added advantage.

We re doing work that matters. Help us solve what others can t.

Role :   Design Verification Engineer

Industry Type :   IT Services & Consulting

Department :   Engineering - Hardware & Networks

Employment Type :   Full Time, Permanent

Role Category :   Hardware

Education

UG :   B.Tech / B.E. in Production / Industrial

PG :   M.Tech in Electronics / Telecommunication

Key Skills

Design verification VLSI Coding Electronics Manager Technology Test planning System verilog UVM Electricals Principal

Skills Required

Vlsi, Design Verification