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Sr. Staff Digital Engineer
Sr. Staff Digital EngineerConfidential • Bengaluru / Bangalore, India
Sr. Staff Digital Engineer

Sr. Staff Digital Engineer

Confidential • Bengaluru / Bangalore, India
23 days ago
Job description

Description

Millions of people experience Synaptics every day. Our technology impacts how people see, hear, touch, and engage with a wide range of IoT applications at home, at work, in the car or on the go.

We solve complex challenges alongside the most influential companies in the industry, using the most advanced algorithms in areas such as machine learning, biometrics, and video processing, combined with world class software and silicon development.

Overview

Synaptics is looking for a Sr. Staff Digital Engineer, WLAN MAC to join our dynamic and growing WPD organization. You will be responsible for MAC architecture / design / implementation in the Wi-Fi 6 / 7 for IoT market. You will provide technical expertise in the latest design methodologies. You will provide expertise in Wi-Fi domain. Your responsibility includes coordinating with multiple teams on specification for design, architecture, timing closure. This position reports to the Director, Silicon Engineering.

Responsibilities & Competencies

Job Duties

  • Define WiFi MAC architecture from Standard
  • Technically lead team on design, methodology
  • Design optimization, enhancement to cater to the need of power and area target
  • Guide and lead the team through digital design, RTL implementation, Lint, CDC checks, timing closure, verification and coverage closure, ECO implementation and chip productization debug
  • Work with Systems / SW team in performance analysis and propose IP enhancements
  • Collaborate with DV team on test plans, closure of code, and functional coverage
  • Support post-silicon bring up activities of the products working with design, product evaluation and applications engineering team

Competencies

  • Strong Digital design and Wireless technology fundamentals
  • Conversant with Wifi 802.11 Standard, networking protocol like L3 / L4 protocol
  • Strong fundamentals in CPU architecture, Host interfaces like (PCIe, SDIO, UART etc.), Bus interconnects specially AXI / ACE / AHB / APB.
  • Knowledge in Lint, CDC, timing constraints, synthesis, power analysis
  • Ability to communicate complex, interactive design concepts clearly
  • Proactive, self-starter, able to work independently in a fast-paced environment to complete projects on time with minimal guidance
  • Well organized with strong attention to detail; proactively ensures work is accurate
  • Positive attitude and work ethic; unafraid to ask questions and explore new ideas
  • Resourceful and able to solve complex problems through adaptation of existing technology and investigation of new technology with a solid understanding of product architecture
  • Analytical and able to make informed decisions based on experience
  • Sets clear expectations and objectives, and brings parties together to drive key initiatives
  • Ability to work within a diverse team and mentor developing team members
  • Excellent verbal and written communication
  • Qualifications (Requirements)

  • Bachelor's or master's degree in computer engineering, Communication, Electrical / Electronic Engineering or related field or equivalent
  • 12+ years of experience in IP design
  • Proven experience in designing digital circuits for wireless product
  • Understanding of digital IC design flow (design, verification, synthesis, HW / SW co-working)
  • Familiar with at least one of the followings : Wi-Fi, Bluetooth, MAC architecture, and Security engine architecture
  • Experience with tapeout of new product
  • No travel required
  • Belief in Diversity

    Synaptics is an Equal Opportunity Employer committed to workforce diversity. Qualified applicants will receive consideration without regard to race, sex, sexual orientation, gender identity, national origin, color, age, religion, protected veteran or disability status, or genetic information.

    Skills Required

    LINT, Synthesis, cdc, Digital Design, power analysis, Timing Constraints

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