About Analog Devices
Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .
Develop the specifications of a block or subsystem in alignment with the product goals, by working closely with system architects
Translate the design specification to an optimal micro-architecture for digital blocksMentor and guide junior engineers to own parts of a subsystemRTL coding using Verilog and System VerilogMeet power, performance and area goals by micro-architecture optimizationBlock level Designer verificationWork closely with DV team to develop test-plansFront end implementation Lint / CDC , synthesis, Timing constraint developmentWork closely with DFT and PD teams for signoffSupport Silicon validationPosition requirementsBE / BS / Mtech / M.E / PhD degree in Electrical / Electronics / Computer science from a reputed institute
6-15 years of relevant experienceBlock or subsystem design ownership experience for at least 3 yearsIn depth understanding of digital logic design principles - control intensive, data-path intensive and multi domain clockingStrong hands-on RTL coding experience and debugging skillsDigital Subsystem, clocking and full chip integration experienceExpertise in timing constraints development and critical path timing closureVery good Experience in Synthesis and LECKnowledge of industry standard bus protocols such as AHB, APB, AXIExperience in digital signal processing and Matlab modeling is highly desirableExperience in Processor subsystem design is highly desirableExcellent verbal and written communication skills to work effectively with teams spread geographicallyExperience in mentoring junior engineersSilicon debug and Product Evaluation , DFT support experienceJob Req Type : Experienced
Required Travel : Yes, 10% of the time
Shift Type : 1st Shift / Days
Skills Required
Synthesis, LINT, lec, System Verilog, Digital Signal Processing, Dft, Silicon Validation