Work closely with
RTL, synthesis, and physical design teams
to ensure
DFT design integrity .
Collaborate with
manufacturing and validation teams
to implement
test strategies for prototype bring-up .
Debug and optimize
DFT networks to achieve minimal test times .
Work with
EDA vendors
to evaluate and integrate latest
DFT tools and methodologies .
Requirements / Qualifications :
15+ years of experience
in # DFT architecture and implementation .
Strong expertise in
FPGA-based #DFT #methodologies
(Xilinx, Intel / Altera, Lattice, etc.).
Proficiency in
Verilog / VHDL
for FPGA design and test logic implementation.
Hands-on experience with
DFT tools
(Synopsys DFT Compiler, Tessent, Mentor Tessent, Cadence Modus, or similar).
Strong knowledge of
JTAG (IEEE 1149.1, 1149.6) , scan insertion, #ATPG, #MBIST, LBIST, and fault modeling.
Experience in # timing analysis and synthesis-aware DFT implementation .
Familiarity with
FPGA prototyping and board bring-up .
Hands-on scripting skills in # Python, TCL, Perl, or Shell
for DFT automation.
Preferred Qualifications :
Experience in
AI / ML-driven DFT automation .
Knowledge of
high-speed interfaces and SERDES testing .
Experience with
post-silicon validation and ATE (Automated Test Equipment) .
Strong debugging skills using
logic analyzers, oscilloscopes, and FPGA tools .
Why Join Us?
Work on
cutting-edge FPGA-based designs
for
high-performance computing, automotive, or AI applications .
Opportunity to
architect and implement
industry-leading
DFT methodologies .
Be part of a highly skilled team pushing the boundaries of FPGA
design & test innovations .
Senior Dft Engineer • India