Minimum Qualifications :
- Bachelor's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR
- Master's degree in Computer Science, Electrical / Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- OR
- PhD in Computer Science, Electrical / Electronics Engineering, Engineering, or related field.
Principal Duties and Responsibilities :
Experience in Logic design / micro-architecture / RTL codingMust have hands on experience with SoC design, synthesis and timing analysis for complex SoCs.Experience in Verilog / System-Verilog is a must.knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking / reset / debug architecture and peripherals like USB, PCIE and SDCC.Work closely with the SoC DFT, Physical Design and STA teamsHands on experience in Low power SoC design is requiredHands on experience in Multi Clock designs, Asynchronous interface is a must.Experience in using the tools in ASIC development such as DesignCompiler, Genus, FusionCompiler and Primetime is required.Understanding of constraint development and timing closure is a plus.Experience in Synthesis / Understanding of timing conceptsSkills Required
Sta, Axi, Physical Design, AHB, Electronics Engineering, Logic Design, SOC design, Rtl Design