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▷ [30 / 10 / 2025] Design Verification Engineer
ACL DigitalBengaluru, Karnataka, India14 hours ago
Job description
Experience : 4-5 Years
Location : Bangalore / Hyderabad
Education : B.E / B.Tech in ECE / EEE or M.E / M.Tech in VLSI / Electronics
Roles and Responsibilities
- Verilog, System verilog, UVM
- VHDL, UVVM
- Simulator exposure with VCS, Questa, Xcelium
- Proficient in simulation and HW languages
- Should be able to interpret various LRMs and comply with semantics and testcase creation.
Share the profiles to raksha.k@acldigital.com.
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Design Verification Engineer • Bengaluru, Karnataka, India
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