Engineer - Wafer Electrical & Sort Test

Tata Electronics Private Limited (TEPL) is a greenfield venture of the Tata Group with expertise in manufacturing precision components.

Tata Electronics (a wholly owned subsidiary of Tata Sons Pvt. Ltd.) is building India’s first AI-enabled state-of-the-art Semiconductor Foundry. This facility will produce chips for applications such as power management IC, display drivers, microcontrollers (MCU) and high-performance computing logic, addressing the growing demand in markets such as automotive, computing and data storage, wireless communications and artificial intelligence.

Tata Electronics is a subsidiary of the Tata group. The Tata Group operates in more than 100 countries across six continents, with the mission 'To improve the quality of life of the communities we serve globally, through long term stakeholder value creation based on leadership with Trust.’

Responsibilities :

Engineer for Wafer Electrical Test (E-Test) and Wafer Sort Test module team for a 300mm Wafer Fab.

Ensure quality compliance across 28nm to 110nm nodes with technology transfer partners.

Drive process improvements, test time reduction, and debug algorithm efficiency.

Coordinate with integration and customer teams on test chip layouts and probe-card design.

Present updates to internal and customer senior executives.

Travel as required.

Essential Attributes :

Proven ability to lead large 24x7 production teams and mentor high-performing professionals.

Self-driven, independent, and results oriented.

Strong cross-functional collaboration skills across global teams.

Inclusive leadership style with adaptability to diverse cultural norms.

Curious, data-driven, and resilient problem-solver.

Open, humble, and relationship-focused communicator.

Creative and agile in exploring new ideas and adapting to change.

Qualifications :

Bachelor’s degree in electrical engineering, Engineering Physics, Materials Science or equivalent; Master’s degree preferred

Strong understanding of device physics, process modules, yield improvement, failure mechanisms

Hands-on experience with Etest Program and / or equipment and ability to analyze and interpret data from Etest structures

Deep experience with Wafer Electrical and Sort Test programs and tools (e.g., HP-Agilent, Keithley, Keysight, Advantest, TEL Probers)

Can write E-test programs; familiar with load boards, probecards, SMUs; familiar with equipment hardware and software

Innovation mindset

Desired Experience Level :

5+ years’ experience in the semiconductor industry with specific experience in E-test / Wafer Sort

Proven structured problem-solving skills using 8D and other methods

Has programmed and managed E-test systems