Company Description
Chiplogic Technologies is an IP and Product Engineering Services company founded in 2018, specializing in high-quality services in the Semiconductor, Systems, IoT, and AI / ML domains. The company offers turnkey solutions spanning from concept to silicon, along with system-level IoT and AI / ML services. Leveraging its proprietary VISARD™ framework, Chiplogic drives innovation in video synthesis and real-time dynamics. Chiplogic is committed to delivering dependable engineering solutions for its clients.
Role Description
We are seeking a highly skilled
Senior AMS (Analog Mixed-Signal) Design Verification Engineer
with strong expertise in
Power Management ICs (PMICs)
to join our dynamic semiconductor design team. The ideal candidate will be responsible for developing and executing verification strategies for complex AMS designs, ensuring functionality, performance, and reliability across process, voltage, and temperature variations.
You will collaborate closely with analog designers, digital verification engineers, and system architects to deliver high-quality verification for cutting-edge PMIC products.
Key Responsibilities
Develop and implement comprehensive
AMS verification plans and testbenches
for PMIC and mixed-signal designs.
Create
behavioral models
of analog blocks using
Verilog-AMS, SystemVerilog, or wreal
modeling techniques.
Perform
top-level mixed-signal simulations
integrating analog and digital domains.
Drive
functional verification
of PMIC features — regulators, DC-DC converters, LDOs, battery chargers, power sequencing, etc.
Work with
analog and digital design teams
to define test coverage goals, verification strategies, and methodologies.
Develop
automated regression environments
for mixed-signal verification.
Debug simulation issues and identify root causes in collaboration with cross-functional teams.
Ensure verification completeness through functional coverage analysis and formal methods.
Support
silicon validation teams
during post-silicon bring-up and debugging.
Contribute to methodology improvements and best practices in AMS verification.
Required Skills & Qualifications
Bachelor’s or Master’s degree
in Electrical, Electronics, or VLSI Engineering.
6–12 years of experience
in AMS design verification within the semiconductor industry.
Strong understanding of
PMIC architectures , analog circuits (LDOs, DC / DC converters, ADCs, references), and power sequencing.
Hands-on experience with
Verilog-AMS / SystemVerilog / UVM-MS
environments.
Proficiency in
Cadence Virtuoso ,
Spectre ,
AMS Designer ,
Synopsys VCS AMS , or equivalent EDA tools.
Good understanding of
digital verification flows , coverage-driven verification, and scripting automation (Python, Perl, or TCL).
Familiarity with
model abstraction ,
corner analysis , and
mixed-signal co-simulation
techniques.
Excellent problem-solving, analytical, and debugging skills.
Strong communication and collaboration abilities across analog, digital, and system teams.
Preferred / Nice-to-Have Skills
Experience with
low-power design techniques
and
verification of power intent (UPF / CPF) .
Exposure to
automotive or consumer PMIC designs .
Knowledge of
LabView ,
Silicon bring-up , or
validation correlation .
Prior experience contributing to
verification methodology development
or
automation frameworks .
What We Offer
Opportunity to work on industry-leading PMIC and AMS designs.
Collaborative and innovation-driven work culture.
Competitive compensation with performance-based rewards.
Professional development and career growth in advanced semiconductor design.
Verification Engineer • Delhi, India