ASIC Digital Design, Manager

The Impact You Will Have :

• Ensure the reliability and performance of our ARC Processor hardware verification.
• Drive the creation of high-quality silicon chips that power the next generation of intelligent devices.
• Enhance the efficiency and effectiveness of our verification processes.
• Contribute to the continuous improvement of our verification methodologies and tools.
• Mentor and develop the skills of team members, fostering a culture of technical excellence.
• Represent Synopsys in global forums, showcasing our technology and capabilities to a wider audience.

What You ll Need :

• Bachelor s degree in engineering from a reputed college.
• Minimum eight years of experience in digital front-end functional verification.
• Strong knowledge of microprocessor architecture.
• Proficiency in HDL and verification languages : SystemVerilog, Verilog.
• Experience with verification methodologies : UVM / OVM.
• Programming skills : C, assembly, Perl, makefile generation.
• Experience with RTL simulators like VCS.
• Proven experience in technical leadership of a verification team.
• Experience working with global teams.

Who You Are :

• Excellent written and verbal communication skills.
• Strong analytical skills with the ability to analyze test results and provide reports.
• Self-motivated team player who thrives in a fast-paced engineering environment.
• Ability to inspire and lead a team towards technical excellence.
• Proactive and able to represent the verification team in global platforms.

Skills Required

Rtl Design, System Verilog, Uvm, Design Verification, ASIC Design