MediaTek - Design Verification Engineer

Job Description :

Key Responsibilities :

• Develop and implement comprehensive verification test plans for subsystems components and IPs in those sub-system.
• Build testbenches from scratch for new Sub systems, develop verification flows and test cases using System Verilog and UVM methodology.
• Drive functional verification of RTL designs at Sub System level or SoC Level including simulation, debugging and coverage closure, ensuring high-quality and robust designs.
• Collaborate with design engineers to understand detailed design specifications and target corner cases and various configurations of subsystem levels.
• Generate and analyze verification metrics to regularly track progress and ensure timely coverage closure.
• Participate in design and verification reviews, test plan reviews, methodology reviews, providing technical expertise and insights.
• Incorporate newer verification techniques and methodologies to improve verification efficiency and effectiveness.
• Guide and mentor junior verification engineers and provide technical guidance .

Qualifications & Experience :

(ref : hirist.tech)