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3 Days Left : DFT Engineer - Sr. / Lead
ACL DigitalIndia30+ days ago
Job description
DFT - Senior / Lead Engineer
Job Description
- Scan insertion.
- SCAN DRC / Coverage debug.
- ATPG Pattern generation.
- Gate level simulations ( Zero delay / Timing Delay simulations).
- Worked on JTAG / P1500 protocols.
- Perl / Tcl scripting.
- Timing / Formal verification / PD flow knowledge is plus.
Location : Bangalore
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Dft Engineer • India
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