IP / SoC RTL Senior / Lead Design Engineer

This role is for an IP / SoC RTL Senior / Lead Design Engineer to be responsible for the development and integration of IP and sub-systems. The ideal candidate will have strong expertise in logic design, RTL coding, and ASIC development, with a focus on creating high-performance, complex digital designs.

Responsibilities

• Responsible for IP / sub-system level micro-architecture development and RTL coding .
• Prepare block / sub-system level timing constraints .
• Integrate IP / sub-system into larger designs.
• Perform basic verification in either an IP verification environment or on an FPGA.

Skills

Qualifications

Skills Required

Design Engineering, ASIC Design, RTL Coding, Logic Design, Microarchitecture, Asynchronous programming