IP Verification Engineer

Job Title :

Senior IP Verification Engineer

Experience : 5+ Years

Locations :

Bengaluru / Hyderabad

Company :

Tessolve Semiconductor

Job Type : Full-Time

About Tessolve :

Tessolve is a leading engineering solutions provider in the semiconductor space, offering end-to-end services in

VLSI design, embedded systems, post-silicon validation, and test engineering . Our global presence and cutting-edge projects provide a strong platform for engineers to grow and innovate.

Role Overview : We are hiring

Senior IP Verification Engineers

with a passion for delivering high-quality, reusable verification components. This role involves working on industry-standard IPs and ensuring functional correctness through advanced verification methodologies.

Key Responsibilities :

Develop robust and reusable

SystemVerilog UVM-based testbenches .

Understand IP-level specifications and create comprehensive

verification plans .

Write and run

directed and constrained-random test cases

to achieve coverage targets.

Build and monitor

functional and code coverage

models; drive coverage closure.

Perform

debugging and root cause analysis

of simulation failures.

Work with cross-functional teams (design, SoC, integration) for issue resolution.

Run

regression suites , triage failures, and maintain test status documentation.

Participate in

IP sign-off reviews

and documentation audits.

Required Skills & Qualifications :

Bachelor’s or Master’s in

Electronics, Electrical, or Computer Engineering .

Minimum

5 years of hands-on experience in IP-level functional verification .

Strong working knowledge of

SystemVerilog, UVM , and object-oriented programming.

Experience with

standard IP protocols

like AXI, AHB, APB, DDR, PCIe, USB, etc.

Proficient in simulation tools like

Synopsys VCS, Mentor Questa, or Cadence Xcelium .

Skilled in scripting languages ( Python, Perl, Tcl ) for automation.

Familiarity with

assertion-based verification ,

scoreboards , and

coverage-driven verification .

Experience using

version control tools

(Git, Perforce) and regression management.

Desirable (Good to Have) :

Knowledge of

formal verification

tools / methodologies.

Experience with

power-aware verification

(UPF / CPF).

Exposure to

hardware emulation ,

FPGA prototyping , or

post-silicon validation .

Experience working in a

multi-site collaboration environment .

Familiarity with

CI / CD tools

like Jenkins or GitLab CI.

What You’ll Get :

Opportunity to work on

complex IPs and next-gen SoC programs .

Exposure to a wide range of technologies across

design, verification, and validation .

Supportive and collaborative team culture with

career growth opportunities .

Access to global semiconductor leaders and

cutting-edge projects .

How to Apply :

Interested candidates may send their updated resumes to :

manjula.patil@tessolve.com

Subject Line : Application for Senior IP Verification Engineer – Bengaluru / Hyderabad