Talent.com
No longer accepting applications
VLSI - DFT Staff Engineer / Principal Engineer [23 / 10 / 2025]

VLSI - DFT Staff Engineer / Principal Engineer [23 / 10 / 2025]

Eteros TechnologiesIndia
12 hours ago
Job description

Company : Eteros Technologies India Private Limited

Eteros Technologies, Inc. is a Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd is a wholly owned subsidiary offices in Bangalore, Noida, Hyderabad and Ahmedabad

  • Our world-wide customers are amongst The Who's who in the semiconductor industry. Eteros works not only with some of the top 20 semiconductor startups in the world but boasts of customers who are among the most respected publicly traded semiconductor companies.
  • Eteros engineers work on cutting edge technology nodes while working on the state-of-the art designs in the AI / ML, Datacenter, Automotive and 5G domains. Eteros engineers work with some of the brightest, innovative and successful engineers and leaders around the world. A one-of-a-kind opportunity where young Eteros engineers showcase their ability and experience world-wide from day 1 while learning from some of the world's most well-respected companies.
  • We are not your traditional design services company offering staff augmentation. Eteros engineers are treated as an integral part of the customer team and routinely are responsible for turnkey, end-to-end ownership and delivery, whether it is Implementation, Digital and Mixed Signal Verification, DFT or Analog Design and Layout. Eteros and our engineers work closely with our customers to define and set methodologies and design flows.
  • Eteros invests in our engineers. Our engineers are continuously learning, on and off the job. They are able to grow the breadth and depth of knowledge. We believe in preparing our employees for the fast-track in career development as well as longevity

Job Title / Role : DFT - Lead / Principal Engineer

Location : Bangalore / Hyderabad / Ahmedabad

Experience Level : 10+ Years

Industry : Semiconductors

Employment Type : Full-time

Job Functions : Engineering

Summary

  • Minimum 10yrs+ experience in DFT implementation
  • Must have worked on Scan Insertion, MBiST, ATPG, Simulations
  • Must have experience with Synopsys DFT tools & Flows
  • Experience in DFT timing closure preferred
  • Experience in multi-die HBM / Memory testing with Synopsys tools preferred
  • Work hands-on on critical tasks of DFT implementation
  • Own the DFT implementation flows, methodologies and execution of SoCs Experience
  • Experience in all phases of the DFT pre and post-Si for large SoCs
  • Implement DFT of SoC / Full-chip-level and / or high-speed cores / blocks
  • Experience in high-speed, low-power, mixed-signal SoC’s is a plus
  • Preferably worked on 5nm / 7nm / 12nm / 14nm / 16nm nodes at the major foundries
  • Experience in developing DFT architecture, Test-plan, implementation methodologies
  • Experience in scan insertion, memory-BIST, JTAG / IJTAG, CTL, IEEE 1149.1 / 1500 wrappers, BSCAN, Compression, ATPG, Simulations, post-Si testing / debug
  • Experience in manual test-point insertion, improve coverage targets, high-compression
  • Experience in hierarchical ATPG, OCC / OPCG, power-aware scan / ATPG methodologies
  • Experience in test-mode constraints generation and test-mode timing closure
  • Experience in patter generation for foundry, post-Si support / debug
  • Thorough understanding of digital design, timing analysis, and physical design process
  • EDA Tools : Cadence (Encounter-Test, Modus-DFT, Tempus, Conformal), Mentor (Tessent tool suite), Synopsys (DFTC, Tetramax, TestMax-DFT, SMS, PTSI)
  • Requirements

  • BTech / MTech / PhD with in Electrical or Computer engineering
  • 10-17years of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs
  • Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compression, IEEE 1500 Std. and MBIST
  • Experience with Cadence & Synopsys DFT tools is required.
  • Strong programming skills in Perl / TCL / C++ and shell scripting is required
  • Must be able to solve complex problems and independently drive tasks to completion in a timely manner.
  • Be able to work under limited supervision and take complete accountability.
  • Excellent written and verbal communication skills
  • What's in it for you

  • Work on leading edge technologies
  • An opportunity for career development and growth
  • Competitive compensation
  • Medical Benefits and more
  • Create a job alert for this search

    Dft Engineer • India

    Related jobs
    • Promoted
    VLSI - DFT Staff Engineer / Principal Engineer

    VLSI - DFT Staff Engineer / Principal Engineer

    Eteros TechnologiesIndia
    Company : Eteros Technologies India Private Limited.Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd...Show moreLast updated: 30+ days ago
    • Promoted
    Apply Now : VLSI - DFT Staff Engineer / Principal Engineer

    Apply Now : VLSI - DFT Staff Engineer / Principal Engineer

    Eteros TechnologiesIndia
    Company : Eteros Technologies India Private Limited.Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd...Show moreLast updated: 30+ days ago
    • Promoted
    Sr RTL Principal Design Engineer

    Sr RTL Principal Design Engineer

    Cadence System Design and AnalysisIndia
    Interface Controller IP development.The role would include design and support of the RTL of the PCIe / CXL / IDE / UALink IP solution of Cadence. The work involved will be working with the existing RTL, a...Show moreLast updated: 30+ days ago
    • Promoted
    RTL Release Principal Design Engineer

    RTL Release Principal Design Engineer

    Cadence System Design and AnalysisIndia
    College education in Electronics Engineering or Computer Engineering Exp- 7-12 Yrs - Working knowledge in RTL design flow steps like RTL coding, Simulation, compilation / testbench validation, Synthe...Show moreLast updated: 30+ days ago
    • Promoted
    DFT Lead Engineer

    DFT Lead Engineer

    ACL DigitalIndia
    Work Location - Bangalore Experience - 7+ Years.Desired Skills and Experience –.SCAN / ATPG, MBIST, Boundary Scan.DFT logic integration and verification. Experience in debugging low coverage and DRC f...Show moreLast updated: 30+ days ago
    • Promoted
    DFT Engineer

    DFT Engineer

    Capgemini EngineeringIndia
    Will be responsible for Designing and Implementing DFT techniques.Should hava a good understanding of Memory BIST / Scan / OnChip Compression / At-speed Scan / Test-clocking / Boundary Scan / Analog Testing / P...Show moreLast updated: 30+ days ago
    • Promoted
    RTL Design Engineer

    RTL Design Engineer

    Capgemini EngineeringIndia
    Experience : 7+years Location : Bangalore Job Description : Candidate should be good in Integration of SOC & RTL coding.Should be aware of soC flow like Spyglass-Lint / Synthesis (DC) / CDC.Should be aw...Show moreLast updated: 30+ days ago
    • Promoted
    VLSI - DFT Senior Engineer / Lead Engineer

    VLSI - DFT Senior Engineer / Lead Engineer

    Eteros TechnologiesIndia
    Company : Eteros Technologies India Private Limited.Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd...Show moreLast updated: 30+ days ago
    • Promoted
    Senior / Lead Engineer - DFT (Wireless SoC) 5+yrs Exp - HYDERABAD Location

    Senior / Lead Engineer - DFT (Wireless SoC) 5+yrs Exp - HYDERABAD Location

    Silicon LabsIndia
    We are the leading provider of silicon, software and solutions for a smarter, more connected world.We hire the most innovative talent in the world to solve the industry’s toughest problems, providi...Show moreLast updated: 26 days ago
    • Promoted
    DFT Engineer - Sr. / Lead

    DFT Engineer - Sr. / Lead

    ACL DigitalIndia
    Job Description Scan insertion.Gate level simulations ( Zero delay / Timing Delay simulations).Worked on JTAG / P1500 protocols. Timing / Formal verification / PD flow knowledge is plus.Show moreLast updated: 30+ days ago
    • Promoted
    Lead DFT Engineer

    Lead DFT Engineer

    eInfochips (An Arrow Company)India
    We are hiring for DFT Engineers.Experience- 5+ years Location-.Bangalore, Ahmedabad, Hyderabad, Noida.Educational Qualification(s) BE / ME •Detailed Description of the Job Profile • Incumbent will be...Show moreLast updated: 30+ days ago
    • Promoted
    • New!
    RTL Engineer

    RTL Engineer

    TEKsystemsIndia
    Client / Domain : Semiconductor Manufacturing.Notice Period Expectations : Immediate to 45 days.Work Location (client) : Hitec city, Hyderabad. Work timings : Normal Working hours.Qualification : Bachelo...Show moreLast updated: 8 hours ago
    • Promoted
    [15h Left] VLSI - DFT Senior Engineer / Lead Engineer

    [15h Left] VLSI - DFT Senior Engineer / Lead Engineer

    Eteros TechnologiesIndia
    Company : Eteros Technologies India Private Limited.Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd...Show moreLast updated: 28 days ago
    • Promoted
    RTL Design Engineers

    RTL Design Engineers

    ACL DigitalIndia
    RTL Design ( Ethernet ) Experience : 5-8 years Location : Hyderabad.Candidate should be with strong RTL design experience. Strong design Experience in Ethernet IPs or Ethernet protocol domain.Verilo...Show moreLast updated: 30+ days ago
    • Promoted
    DFT Engineer

    DFT Engineer

    Modernize Chip Solutions (MCS)India
    We are having opportunities for DFT Engineers.Hands on experience in Tessent DFT RTL insertion, DRC checks and debug is a must. Hands on experience on Scan Insertion, ATPG, GLS debug, MBIST pattern ...Show moreLast updated: 30+ days ago
    • Promoted
    Lead DFT Engineer

    Lead DFT Engineer

    Tech MahindraIndia
    Open position : - Lead DFT Engineer Experience : - 7+ years Location : - Bangalore NP : - Immediate to 15 days JD : - 1.Experience with DFT tools such as Synopsys DFT Compiler, Test Kompress and Xelium.Mi...Show moreLast updated: 29 days ago
    • Promoted
    DFT Lead Engineer

    DFT Lead Engineer

    7Rays SemiconductorsIndia
    Job Description- The candidate is expected to have clear understanding of IJTAG, P1500 protocols and should have hands on experience of at least one of these. The candidate is expected to have clear...Show moreLast updated: 30+ days ago
    • Promoted
    DFT Engineer

    DFT Engineer

    ACL DigitalIndia
    Job Title : DFT Engineer Experience Level : 4+ years Location : Hyderabad / Banglaore Job Description : Key Responsibilities : Develop and implement DFT architecture and methodologies for ASIC / SoC designs...Show moreLast updated: 30+ days ago
    • Promoted
    Lead DFT Engineer

    Lead DFT Engineer

    ACL DigitalNagpur, IN
    Semiconductors / ASIC / SoC Design.DFT architecture, planning, and implementation across complex SoC / ASIC designs.As a technical leader, you will mentor junior engineers, collaborate with cross-fun...Show moreLast updated: 30+ days ago
    • Promoted
    FPGA RTL Design Engineer

    FPGA RTL Design Engineer

    Centaurus Technologies and Systems Private LimitedIndia
    Job Summary We are seeking a talented.VHDL / Verilog for FPGA-based systems.The ideal candidate will be responsible for the full FPGA development lifecycle, from architecture design to verification, ...Show moreLast updated: 30+ days ago