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▷ (18 / 10 / 2025) Senior DFT Engineer

▷ (18 / 10 / 2025) Senior DFT Engineer

Modernize Chip Solutions (MCS)India
1 day ago
Job description

We’re Hiring – DFT Engineer (6+ Years Experience)

Location : Bengaluru (On-site)

Notice Period : Immediate to 15 Days

Job Description :

We are looking for a skilled DFT Engineer with 6+ years of experience, strong expertise in Tessent DFT RTL insertion, DRC checks, and debug. The ideal candidate should have hands-on experience in Scan Insertion, ATPG, Gate-Level Simulation (GLS) debug, MBIST pattern generation, and validation.

Key Responsibilities :

  • Perform DFT RTL insertion using Tessent tools and ensure quality through DRC checks and debug.
  • Execute Scan Insertion, ATPG, and MBIST generation and validation.
  • Conduct timing-enabled GLS and perform related debug activities.
  • Work independently on assigned tasks and communicate effectively with cross-functional teams.
  • Possess strong debug skills and the ability to resolve issues efficiently.
  • Have a basic understanding of DFT IPs such as OCC, EDT, SSN, MBIST controllers, IJTAG, and IEEE 1600 standard (Boundary Scan).
  • Working knowledge of TCL scripting is an added advantage.
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Senior Dft Engineer • India

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