Analog Design Engineer, Senior

Job Overview

The successful candidate will work on Characterization, CAD views generation and Packaging of General purpose and Specialty IOs. The candidate is expected to generate and validate EDA views like .lib (NLDM / NLPM, CCST / P / N, variation modelling etc), APL, CMM, BPA, Verilog, ATPG, NDM, LEF, IBIS, CDL, GDS etc. The candidate will also be required to work on scripting to optimize above activities. The candidate will also be required to work on flow and methodology setup for these EDA views.

Responsibilities and Duties

• Generation, validation, QA and release of IO libraries
• Ensure high quality and timely deliverables
• Interacts with Design and layout teams to understand the design and flow requirements
• Work on automation to optimize the view generation and validation process.
• Setup the generation and validation flow methodologies for different EDA views.
• Analyze customer issues and provide timely resolution

Qualifications

Skills Required

IBIS, Verilog, APL, Ndm, Gds, ATPG, Cmm, bpa