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FPGA Design Engineer
FPGA Design EngineerDhruva Space • hyderabad, telangana, in
FPGA Design Engineer

FPGA Design Engineer

Dhruva Space • hyderabad, telangana, in
7 hours ago
Job description

Role overview and responsibilities :

Dhruva Space is looking for an experienced FPGA Design Engineer to support the development of a custom, indigenous communication waveform designed for long-range, low-power, and interference-resilient wireless links. The ideal candidate will implement and optimize advanced PHY-layer algorithms on FPGA platforms while collaborating closely with DSP, RF, and system engineering teams.

In this role, you will contribute to waveform design, simulation, FPGA implementation, and system-level integration, playing a key part in developing cutting-edge communication technology for space and advanced wireless systems.

Key Responsibilities include but are not limited to :

  • Implement frequency-agile and spread-spectrum waveform components using VHDL / Verilog / SystemVerilog.
  • Develop and optimize baseband modules including modulation, symbol processing, synchronization, hopping mechanisms, and framing.
  • Conduct algorithm and waveform simulations using MATLAB / Simulink or Python before hardware deployment.
  • Integrate and validate designs on Xilinx Zynq, RFSoC, USRP, and other SDR platforms.
  • Work with DSP, RF, hardware, and system teams for bring-up, testing, and end-to-end integration.
  • Prepare clear technical documentation covering waveform architecture, FPGA implementation, simulations, and validation results.

Candidate Requirements :

  • M.Tech / B.Tech / Ph.D. in Electronics, Communication, Embedded Systems, or related fields.
  • 3–6 years of experience in FPGA development, digital communication, or waveform / PHY-layer implementation.
  • Strong understanding of Digital Communication Systems and PHY-layer design.
  • Hands-on experience in custom or proprietary waveform development, including spread-spectrum or frequency-diverse techniques.
  • Proficiency with FPGA toolchains such as Vivado, Vitis, ModelSim, Quartus, etc.
  • Expertise in VHDL / Verilog and DSP simulation using MATLAB or Python.
  • Experience with SDR hardware such as USRP, HackRF, or LimeSDR.
  • Knowledge of timing, synchronization, and RF link fundamentals is an added advantage.
  • Prior experience in narrowband PHY development or waveform R&D.
  • Familiarity with wireless system testing, validation, and lab instrumentation.
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    Design Engineer • hyderabad, telangana, in

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