Senior / Lead Physical Design Engineer

We are seeking an experienced, highly motivated and high-caliber individual to build these differentiating products. Does this sound like a good role for you?

• Senior / Lead Physical Design Engineer (R&D Engineering)
• Location : Hyderabad & Bhubaneswar & Bangalore
• Experience : 5yrs to 15yrs
• Strong experience in standard ASIC backend implementation, physical design and signoff flows
• Solid hands-on experience on tools for synthesis, partitioning, CTS, P&R, STA etc.
• Exposure to design implementation and signoff of soft & mixed-signal IPs and subsystems
• Strong understanding of RTL2GDSII flow and design implementation methodologies such as synthesis, place & route, timing closure, STA, EMIR, and layout closure
• Hands-on experience with industry standard backend tools like PrimeTime (PT / PT-PX), ICC2, Design Compiler, Fusion Compiler or equivalent used in the RTL2GDSII implementation
• Skilled in layout of digital blocks using appropriate ASIC physical design techniques
• Experience with design methodologies like developing custom scripts and enhancing flows for better execution.
• Experience in scripting with TCL / PERL is required

Please share your updated CV with taufiq@synopsys.com or refer those who would like to explore this opportunity.