Phinity collaborates with frontier labs to create environments for hardware design and verification training tasks.
Candidates will work closely with researchers on real-world challenges in RTL design, verification, and debugging. This is a remote / hybrid position with flexible hours.
Key Responsibilities :
- Develop realistic RTL design and verification problems reflecting industry complexity and best practices.
- Create containerized environments for agent training tasks in hardware design workflows.
Required Skills and Qualifications :
2+ years of experience in RTL design using Verilog / SystemVerilog or VHDL.Strong background in verification methodologies (UVM, SystemVerilog, testbench development).Experience with synthesis, timing analysis, and debugging tools.Familiarity with EDA tools (Synopsys, Cadence, Mentor Graphics).Benefits :
Opportunity to collaborate with experts in the field.Flexible working hours.Additional Information :
Strong problem-solving and analytical thinking skills are essential.Excellent communication skills are necessary for cross-functional collaboration.A curiosity about AI / ML applications in hardware design is desirable.