Job description
Responsibilities :
- Develop complex communications or signal processing blocks for wireless-IOT products. Understanding of OFDM / signal processing is strongly desired
- Collaborate with System Engineers to drive the definition of wireless blocks to meet product requirements. Proficiency in Matlab / C is strongly preferred
- Micro-architecture and RTL design of modules using Verilog / System Verilog HDL coding, adhering to quality standards.
- Prepare and hold Architecture, Design, and Verification reviews with technical staff throughout project lifecycle
- Pre-silicon verification utilizing a combination of block / chip-level test benches.
- Validation / bring-up of designs on silicon, providing support to cross-functional teams
- Apply Low-power digital circuit design concepts
Skills required :
Demonstrated ability to work with Systems team to micro-architect and design complex digital subsystemsUnderstand Matlab algorithm implementation and translate to effective RTL micro-architecturesVerilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to productionExperience with logic simulators for both RTL and gate-level simulation, design / waveform browsers (like vc, Questasim), and power analysis toolsExperience with logic synthesis, timing constraints and timing closureExperience in working with backend team to optimize design for power performance and areaExperience with scripting and automation. Knowledge of Python, Perl, and TclExperience with revision control and configuration management systems (such as Perforce, Git, Methodics)Excellent written and verbal communications skillsDemonstrated ability to generate high output in a self-driven mannerSkills Required
Wireless, Automation, Python