Minimum of ten years of hands-on Test Development experience (DFT, EDA tools, etc..)Solid knowledge & experience in defining test solutions for multi-million gate SOC (Scan & MBIST) with Mixed Signal IPs (PLL, High Speed SERDES, DDR)Knowledgeable in full SOC design and manufacturing cycle with specialized / direct experience in multiple areas; RTL / Custom Logic design, Synthesis, P&R, STA, Integration, Verification, Characterization and ATE testStrong understanding of relationships between Hardware, Firmware and Software in FPGA and / or multi-processors SOC. Past experience in leading the team to successful silicon bring-up and problem solving in a complex systemStrong planning, project, and people management skills required. Must have experience developing managers and individual contributorsExperienced hands-on technical manager not afraid to dig into details to provide technical direction Proven track record of delivering results and meeting quality, cost, and time-to-market objectivesAbility to collaborate with overseas colleagues to define strategy, plan, and execute across the larger, global organizationStakeholder influencing and people skills must be excellent.Needs to be able to set aggressive goals and manage risks effectivelyMust have a thorough understanding of tool development methodology.Ability to manage software development tasks associated with specifying, developing, scheduling, and debugging according to current and future tool requirements.Role : Product Design Engineer
Industry Type : Electronic Components / Semiconductors
Department : Engineering - Hardware & Networks
Employment Type : Full Time, Permanent
Role Category : Hardware
Education
UG : Any Graduate
PG : Any Postgraduate
Skills Required
engineering services , Dft, Fpga, Debugging, Soc, Scheduling, Mixed Signal