ASIC Physical Design, Sr Staff Engineer

The successful candidate :

• has solid engineering understanding of the underlying concepts of IC design, implementation flows and sign-off methodologies for deep submicron design.
• has intimate knowledge of the full design cycle from RTL to GDSII, including development of timing constraints
• has good scripting & programming skills (Perl, Tcl, Python etc); knowledge of CAD automation methods.
• Can interface with the larger product team to understand design constraints, deliverable formats, customer requirements
• Independent, timely decision maker and able to cope with interrupts
• Knowledge of IP Subsystem implementation & FE flows are added advantages

8+ years of hands-on experience in ASIC physical implementation and EDA tools with recent contribution to project tape-outs. Must demonstrate knowledge of the Synopsys tools, flows and methodologies including Design Compiler, IC Compiler / 2, Fusion Compiler, Primetime, Formality, Star-RCXT, Hercules / ICV and other industry tools.

Skills Required

ASIC physical implementation, RTL to GDSII design flow, Timing constraints and sign-off, Scripting in Perl / Tcl / Python, Fusion Compiler