JD :
Should be able to work independently on SRAM memory IP layout development.
Skill Requirements : -
Proficient with calibre LVS / DRC verification. Leafcell development of SAM blocks.
Experience : - 5-14 years
Qualifications : B.Tech / B.E / M.Tech / M.E
Thanks,
Riki Dutta Saha
Email : rikidutta@mirafra.com
Engineer • Bengaluru, Karnataka, India