About the Role
We are seeking a skilled Configware Developer to join our R&D Team
Job description :
- Hands on experience with any of the FPGA families from AMD, Intel
- Knowledge of FPGA architecture, IO features, IO Constraints
- Thorough Knowledge of digital design fundamentals
- Thorough Knowledge of VHDL
- Static timing analysis, timing optimization, timing constraints, clock domain crossing
- Communication protocols including I2C, SPI, UART, MDIO
- Experience in FPGA bring up activities
- Experience in debugging of RTL issues at functional level or system level
- Working knowledge in transceiver or SerDes based protocol design.
- Awareness of PCI-Express protocol / AXI will be an advantage
Requirements :
Strong programming skill in Verilog, VHDL and a solid understanding of digital design, static timing analysis and timing closure techniquesProficiency in Vivado synthesis and implementation flow for high speed designs and usage of debug tools like ChipscopeSignal tapIdentify debuggerProficiency in Zync SoC based developmentExperience in High Speed Digital Interfaces like Aurora, sFPDP, MGT, etc.Knowledge working experience on RTOS and its concepts would be added advantageExperience in bench verification and working with lab equipment will have added advantageKnowledge of embedded C programming is a plusComfortable in Linux environment (like PetaLinux)Articulate and able to write clear, well-organized, concise documentsExcellent written and verbal English Communication skills environment(ref : hirist.tech)