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▷ (Apply in 3 Minutes) SOC DFT Engineer

▷ (Apply in 3 Minutes) SOC DFT Engineer

ACL DigitalIndia
30+ days ago
Job description

SoC DFT Engineer

Job Description :

  • Scan insertion.
  • SCAN DRC / Coverage debug.
  • ATPG Pattern generation.
  • Gate level simulations ( Zero delay / Timing Delay simulations).
  • Worked on JTAG / P1500 protocols.
  • Perl / Tcl scripting.
  • Timing / Formal verification / PD flow knowledge is plus.

Location : Bangalore

Notice Period : Immediate

Experience : 5+ Years

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Dft Engineer • India

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