Principal SRAM Design Engineer

Job Description : -

1) Contribute / Lead towards Design and Development of Single / Multiport SRAM, Register file compilers in 7FF / 5FF / 3FF / 2nm Technologies

2) Circuit design / simulation of key components such as bitcell, WL decoder, Sense Amplifier , Column decoder and control logic.

3) Development of critical path and characterization flow to perform detailed margin and characterization simulations of the designs .

4) Statistical Analysis of Bit-Cell , Sense Amplifier and Self Time Blocks for Compiler Target yield Sign-Off

5) Design Tuning / optimizations , Margin Analysis and Sign-Off for Complete Compiler to meet Yield and Performance targets.

6) Logic simulations and detailed timing analysis of key paths in high speed memory design.

7) Coordination among various team members design team, modeling team, layout team and verification team.

Skill Sets Needed :

1) Expertise of high speed / low power CMOS circuit design , clocking scheme, Static and dynamic logic circuits

2) Experience in Designing and Driving one or many Memory Compilers Specifications to final release

2) Complete hands on experience in using Cadence / Mentor schematic / layout editor tools

3) Complete hands on experience with Circuit simulation, MC analysis and waveform viewer tools such as HSPICE, HSIM, XA, FinSim, XARA, nWave, WV etc

6) Experience in Skill / Perl / Python Scripting is a strong plus 7) Experience in Understanding the layout design issues and process issues / limitation in FINFET is a Plus

Skills Required

Circuit Simulation, Sram, Python