Staff / Sr. Staff Design Verification (Hybrid / Remote)

We’re building high-performance RISC-V CPUs from the ground up, and we need someone who can help us test them thoroughly and thoughtfully. As a testbench lead, you'll design and maintain the infrastructure that makes sure our cores behave exactly as intended. If you enjoy figuring out how things break (and fixing them), building clean and reusable systems, and working with a team that values both rigor and creativity, we’d love to talk.

This role is hybrid / Remote, based out of Bangalore.

We welcome candidates with 9+years of relevant experience for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who You Are

You have built and maintained testbenches for complex designs such CPU, GPU etc using SystemVerilog, UVM, and C++.

You like creating clean, reusable components — from transactors to functional models — that others can plug in and build on.

You’re comfortable working across both software-style C++ / UVM environments and hardware-style simulation flows.

You enjoy collaborating with design teams and helping them debug issues quickly and clearly.

What We Need

Someone to design and grow a UVM testbench setup that works for both block-level and full-chip simulation.

The ability to write C++ code that fits into a DV framework — and help shape that framework as it evolves.

A good understanding of CPU microarchitecture and how to test it effectively.

Comfort working across tools, from open-source simulators like Verilator to commercial environments and emulators.

What You Will Learn

How to design testbenches that scale with complexity — and keep them maintainable as the chip grows.

How to support both simulation and emulation from the same DV infrastructure.

How custom C++ and UVM environments can coexist to improve verification workflows.

How different teams — RTL, DV, software, tools etc — come together to build AI-focused silicon.