Sr Staff Engineer, Physical Verification

Job Description

Physical verification engineer for SOC / blocks

Key Responsibilities

• Physical verification for SOCs, cores, and blocks, including DRC, LVS, ERC, ESD, DFM, and tapeout processes.
• Address critical design and execution challenges associated with physical verification and sign-off.
• Have a comprehensive understanding of physical verification and sign-off workflows and methodologies.
• Partner with PNR engineers to achieve sign-off at various stages of the design process.

Qualifications

Proficient in physical verification for SoC / full-chip and block-level processes, including DRC, LVS, ERC / PERC, DFM, OPC, and tape out.

Experience : 7-15Y

Company Description

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world leading MCUs, SoCs, Analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of electronics you rely on every day; you may not see our products, but they are all around you.

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements : Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.