Emulation Engineer - RTL / ASIC

Description :

• Must haves hands on Experience in more than 2 Emulation projects with Mentor Veloce, / Cadence Palladium / Synopsys Zebu.
• The Emulation engineer will help bring-up SOC designs on Emulator platform. Responsibilities include set-up emulation environment, simulate, create run-time environment and emulator bring up..
• Build Emulation models.
• Port ASIC / IP RTL to Emulation platform.
• Implement emulation Testbenches.
• Experience in creating C++ DPI Transactors.
• Bring up external interfaces.
• Run Software test cases on emulator and enable different debug options.
• experience with Verilog, System Verilog and UVM Verification.
• Experience with PCIe4 , USB3 DDR4, Ethernet etc.
• Create and execute Test plans IP and SoC level..
• Experience with Speed Bridge Integration and perform real time testing..
• Experience in Automation and increasing process efficiency.
• Work closely with the Verification / SW teams.

(ref : hirist.tech)