Solid understanding of computer architecture and digital systems RTL code for IP, sub-systems, and SoCs.
Proficiency in hardware description languages (HDLs) such as Verilog or system Verilog
Experience in building emulation model builds from scratch for SoC components
Familiarity with emulation platforms and tools (e.g., Cadence Palladium, Mentor Graphics, Synopsys ZeBu). including model compilation, test execution, and debugging – Mandatory skillsets
Knowledge of FPGA (Field-Programmable Gate Array) technology, including synthesis, implementation, and debugging.
Experience in setting up and configuring emulation environments.
Ability to manage emulation servers, clusters, and resources effectively.
Knowledge of software tools used in conjunction with emulation (debuggers, performance analyzers, test automation frameworks).
Ability to develop and execute verification plans specific to emulation environments
Protocol knowledge of peripherals : Proficient in Arm CPU cores and PCIe Gen4 / 5, JTAG, SPI, UART, I2C, USB2.0, USB3.0, Display Port, HDMI, Ethernet 1G / 2,5G / 5G / 10G
Experience in XTOR Integration and a hands on experience on Speedbridges and Vrtual Bridges is a plus.
Scripting and Automation
Proficiency in scripting languages Unix, Python, Perl, Tcl for automation of emulation tasks, test case generation, and results analysis.
Experience in developing automated flows for regression testing and continuous integration (CI) pipelines.