STA Engineer

Job Description

• B.Tech or M.Tech in Computerss / Electronics / Electrical Engineering with minimum of 4 years of strong, hands on block / sub HM level Timing closure or chip top level timing closure.
• Should have experience in 28nm below technologies experience in 10nm below is an added advantage
• Should be open to work from Hyderabad or Bangalore.

Skills Required

Skills : scripting experience in perl / tcl,sta,timing,prime,timing closure at sub hm / block / top level,excellent debugging skills,netlist and constraint sign in checks and validation,top level timing closure with sign off sta in mmmc,prime time constraint development,multimode multi corner timing knowledge,xtalk and ocv,eco implementation strategy development for netlist, rtl and timing level changes,timing closure

Skills Required

Excellent debugging skills in implementation issues, Top level ECO implementation strategy development for netlist RTL and timing level changes, Top level timing closure with sign off STA in MMMC with Xtalk and OCV, Multimode multi corner timing knowledge and timing closure at sub HM block top level, Netlist and constraint sign in checks and validation, Prime time constraint development at full chip level and clean up