DSP IP SS Design Verification - Sr Lead Engineer

General Summary :

Join Qualcomm's HEXAGON DSP team, responsible for high-performance DSP cores integral to Qualcomm's multi-tier SoC roadmap in mobile devices. This role focuses on design verification of complex proprietary DSP IP with an emphasis on power-aware verification.

Key Responsibilities :

• Lead design verification for DSP subsystem IP in collaboration with global architecture, design, and power teams.
• Architect, implement, and enhance SystemVerilog testbench environments following UVM / OVM methodologies.
• Develop comprehensive verification plans and execute simulation, assertions, formal verification, and HW-SW co-verification.
• Drive power-aware RTL simulation using UPF methodologies.
• Perform detailed debugging and simulation tasks to ensure product quality.
• Automate verification processes with scripting and verification tools to improve efficiency and quality.
• Ensure coverage goals and deliver high-quality commercial-ready IP.

Minimum Qualifications :

Required Skills & Experience :

Skills Required

Dsp, Debugging, RTL, Digital Design, System Verilog