At the forefront of innovation, we're pioneering the use of AI-powered environments to automate hardware engineering. These cutting-edge platforms enable agents to train on complex design and verification tasks, mirroring real-world semiconductor development.
We seek experienced professionals to collaborate with researchers in developing high-quality RTL design, verification, and debugging challenges that reflect industry best practices.
- Develop realistic RTL design and verification problems reflecting industry complexity and best practices
- Create containerized environments for agent training in hardware design workflows
- Work closely with AI researchers to understand agent capabilities and training needs
Required Experience :
2+ years of experience in RTL design using Verilog / SystemVerilog or VHDLStrong background in verification methodologies (UVM, SystemVerilog, testbench development)Familiarity with synthesis, timing analysis, and debugging toolsExperience with industry-standard EDA tools (Synopsys, Cadence, Mentor Graphics)Essential Skills :
Strong problem-solving and analytical thinkingExcellent communication skills for cross-functional collaboration with non-expert researchersCuriosity about AI / ML applications in hardware designSelf-motivated and able to work independently in a remote environmentThis is a flexible hour remote / hybrid position offering competitive pay based on experience.