Floor planning, power planning, placement, and optimizationClock tree building and optimizationRouting and optimizationTiming constraints closure, synthesis, and formal verificationExtraction, IR drop analysis, EM analysis, and signal integrityPhysical verification and flow development for advanced technology nodesThe Impact You Will Have : Enhance the best practices of the physical design flowContribute to the successful implementation of high-performance digital designsDrive innovations in low-power design and high-speed clock distributionEnsure the integrity and reliability of complex IC designsSupport the development of cutting-edge technology that shapes the futureCollaborate with cross-functional teams to meet customer requirementsWhat You ll Need : Solid engineering understanding of IC design conceptsStrong knowledge of the full design cycle from RTL to GDSIIExpertise in implementation flows and methodologies for deep sub-micron designsExperience in high-performance digital design, CAD, high-speed design, low-power design, and high-speed clock design and distributionProven experience with project tape-outs and timing closureProficiency in software and scripting skills (Perl, Tcl, Python)Knowledge of Synopsys tools, flows, and methodologiesSkills Required
Floorplanning and power planning, Clock tree synthesis and optimization, Routing and physical optimization, Timing closure and formal verification