Trace and Debug Architect

Job Title : Trace and Debug Architect

Experience Level : 12–15 years in Embedded Systems / Silicon Firmware

Role Overview

We are seeking a highly skilled Trace and Debug Architect with deep hands-on expertise in silicon bring-up, low-level debugging, and advanced trace methodologies. The candidate will own the strategy and execution of trace, debug, and post-silicon validation flows for complex SoCs and automotive-grade ECUs. This role demands proficiency with JTAG, ETM, CoreSight, and industry-standard debug tools, as well as the ability to collaborate closely with silicon, hardware, and firmware teams to diagnose and resolve intricate system-level issues.

Key Responsibilities

• Define and implement trace / debug strategies across SoC subsystems (CPU, GPU, ISP, PCIe, DDR, CAN, Ethernet, etc.).
• Lead silicon bring-up and low-level hardware / software co-debug activities using JTAG, SWD, and trace tools.
• Configure and utilize ARM CoreSight, ETM, STM, and trace infrastructure for runtime visibility and performance analysis.
• Drive debug methodology using Lauterbach, Segger, or equivalent emulators; oscilloscopes and logic analyzers for board-level analysis.
• Analyze crash dumps, core traces, and performance logs to root-cause issues spanning silicon, firmware, and board domains.
• Partner with silicon architects, verification, and board design teams to define trace / debug requirements early in the design cycle.
• Collaborate with firmware and driver teams to integrate trace hooks, debug registers, and diagnostics frameworks.
• Support post-silicon validation, performance tuning, and issue triaging across automotive and high-performance Compute platforms.
• Establish best practices, debug flows, and documentation for cross-functional teams and customer support.
• Provide mentorship to engineers on advanced debug methodologies and tool usage.

Required Skills & Qualifications

Education