Lead Memory Design Engineer [18 / 10 / 2025]

Job Title : Lead Memory Design Engineer

Experience : 6+ Years

Location : Bangalore

Employment Type : Full-time

Industry : Semiconductors / VLSI / Memory IP / SoC

Job Summary :

We are looking for an experienced and highly motivated Lead Memory Design Engineer to drive the architecture, design, and development of advanced memory IPs such as SRAMs, ROMs, CAMs, and Register Files. The role involves leading a team of designers, interacting with cross-functional groups, and delivering high-performance, low-power, and silicon-proven memory solutions at advanced technology nodes.

Key Responsibilities :

• Define architecture and design specifications for custom memory IPs or memory compilers.
• Design and optimize circuits such as :
• Memory cell arrays, sense amplifiers, precharge, write drivers, decoders, control logic
• Lead the schematic-level design and simulation (pre-layout and post-layout) for performance, power, and robustness.
• Collaborate with layout, verification, and technology teams to ensure full-cycle delivery.
• Guide post-layout activities including parasitic extraction, IR / EM analysis, and corner validation.
• Ensure designs meet requirements for DFM, yield, reliability, and aging.
• Contribute to methodology and flow development for memory design and characterization.
• Support silicon bring-up and correlation with pre-silicon simulation.
• Provide technical leadership and mentorship to junior engineers.
• Drive design reviews and coordinate with program managers for delivery timelines.

Required Skills and Experience :

Preferred Qualifications :

Interested can share Cv to Sharmila.b@acldigital.com