Memory Design Engineers

Job Title :

Memory Design Engineer

Experience Required :

2+ Years

Location : Bangalore

Job Type : Full-time

Industry :

Semiconductors / VLSI / Memory IP

Job Summary :

We are seeking a skilled

Memory Design Engineer

to join our advanced memory IP development team. The candidate will be responsible for architecting, designing, and validating high-performance and low-power memory blocks (e.g., SRAM, ROM, Register Files) for use in SoCs and ASICs across leading-edge process technologies.

Key Responsibilities :

Design custom memory circuits such as SRAM, ROM, CAM, Register Files, or eFuse.

Work closely with layout, verification, and technology teams to ensure optimal performance, power, and area (PPA).

Perform transistor-level circuit design, simulation, and optimization for speed, power, and robustness.

Analyze and simulate key circuits : sense amplifiers, bitline pre-charge, wordline drivers, decoders, write drivers, etc.

Run simulations across PVT corners using tools like HSPICE, Spectre, or XA.

Collaborate with layout teams for floorplanning and to ensure DRC / LVS clean layouts.

Perform post-layout simulations and analysis (IR drop, EM, aging).

Participate in memory characterization, yield improvement, and silicon bring-up support.

Contribute to memory compiler development (if applicable).

Required Skills and Experience :

B.E / B.Tech or M.E / M.Tech in Electronics, Electrical Engineering, or VLSI.

2+ years of experience in full custom memory design.

Strong background in analog / mixed-signal CMOS circuit design.

Proficiency in simulation tools : HSPICE, Spectre, FastSPICE, XA.

Experience with design in advanced nodes (e.g., 28nm, 16nm, 7nm, 5nm, FinFET).

Familiarity with ESD, IR drop, EM, and reliability analysis techniques.

Understanding of process variation and Monte Carlo simulations.

Good debugging, problem-solving, and documentation skills.

Preferred Qualifications :

Experience with memory compiler architecture / design.

Knowledge of radiation-hardened memory (RHBD) or safety-compliant memory (ISO 26262).

Scripting knowledge (e.g., Python, Perl, Tcl) for automation.

Exposure to silicon bring-up and correlation to simulation results.

Interested can share Cv to Sharmila.b@acldigital.com