ASIC Design and STA Engineer

NVIDIA has continuously reinvented itself. Our invention of the GPU sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. Today, research in artificial intelligence is booming worldwide, which calls for highly scalable and massively parallel computation horsepower that NVIDIA GPUs excel.

NVIDIA is a 'learning machine' that constantly evolves by adapting to new opportunities that are hard to solve, that only we can address, and that matter to the world. This is our life's work, to amplify human creativity and intelligence. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!

NVIDIA is looking for a best-in-class ASIC STA Engineer to join our outstanding Networking Silicon engineering team, developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency for today's AI platforms! Come and take a part in designing our groundbreaking large scale and innovating chips, enjoy working in a meaningful, growing and highly professional environment where you make a significant impact in a technology-focused company.

What You Will Be Doing

• Be in charge of full chip and / or chiplet level STA convergence from early stages to signoff.
• Take part in top level floor plan and clock planning.
• Optimize, together with CAD signoff flows and methodologies.
• Digital Partitions' and analog IPs' timing integration, giving feedback to PD / RTL and driving convergence.
• Work closely with logic design and DFT engineers to define and implement constraints for the various work modes, including their optimization for runtime and efficiency.

What We Need To See

Skills Required

Sta, EDA Tools, Timing Analysis, Physical Design