Design Verification Engineer

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Hiring : Design Verification Engineer (6+Years Experience) | Bangalore| Immediate Joiners Preferred

Location : Bangalore, India

Experience : 5+ Years

Domain : Semiconductor

Notice period : Immediate to 30days

Skills Highlighted : System Verilog, UVM,AXI / ACE.

Key_Requirements :

• Extensive experience in executing IP verification or subsystem verification of complex blocks.
• Proficiency in SystemVerilog (SV), Universal Verification Methodology (UVM), assertions, testbenches, test plans, and coverage.
• Strong experience in verifying Fabric / NOC / Interconnect blocks.
• Knowledge of protocols such as AMBA suite (AXI / ACE), PCIe, CXL, interrupt handling, and power management.
• Experience or knowledge of coherent traffic verification is a plus.

If interested kindly share your updated CV to [email protected]

Please reach out to me in WhatsApp for more details : +91 95850 44407