Senior Design Verification Engineer

Lead Verification Engineer

Experience : 10+ Years

Location : [Bangalore| Ahmedabad | Pune| Hyderabad]

Employment Type : Full-Time

Job Description :

We are seeking a highly skilled and motivated Design Verification Engineer with 10+

years of hands-on experience in SoC verification. The ideal candidate will be responsible for

developing and executing comprehensive verification plans for high-performance SoCs,

collaborating with cross-functional teams, and ensuring quality standards are met

throughout the verification cycle.

Key Responsibilities :

• Drive SoC Design Verification efforts for complex projects, ensuring thorough validation of functionality and performance.
• Develop and implement verification strategies, including test plans and test benches for both low-speed peripherals (I2C / I3C, SPI, UART, GPIO, QSPI) and high-speed interfaces (PCIe, Ethernet, CXL, MIPI, DDR, HBM).
• Conduct Gate-level simulations and power-aware verification using Xprop and UPF.
• Collaborate with architects, designers, and pre / post-silicon teams to define and validate verification requirements.
• Implement and analyze System Verilog assertions and coverage (functional, toggle, code).
• Guide and mentor junior verification engineers while fostering a collaborative and innovative team environment.
• Ensure verification signoff criteria are met, with complete and accurate documentation.
• Contribute to continuous improvement of verification methodologies and best practices.
• Integrate third-party VIPs from Synopsys and Cadence.

Required Skills & Experience :

SoC-level and IP-level verification

DDR, HBM, Xprop, and UPF-based simulations

Processor-based SoC verification environments (native, Verilog, System Verilog, UVM)

Qualifications :