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Standard Cell Layout Engineer, Staff Engineer
ConfidentialBengaluru / Bangalore30+ days ago
Job descriptionEnsure the delivery of high-quality layout designs for Logic Libraries IP development, integral to SOC subsystems. Enhance the manufacturability and reliability of our silicon lifecycle monitoring solutions. Drive innovation in layout design methodologies and best practices. Collaborate effectively with circuit designers to meet design specifications and constraints. Contribute to the overall success of the Logic Libraries IP group. Bachelor s or master s degree in electronics engineering or a related field. 6+ years of experience in standard cells layout design for digital circuits. Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler. Exceptional knowledge of layout design methods, techniques, and methodologies. Experience with physical verification tools, such as ICC2. Understanding of semiconductor process technologies and their impact on layout design. Excellent problem-solving and systematic skills. Ability to work effectively in a team-oriented environment. Good communication and interpersonal skills.
What You ll Be Doing :
- Collaborate with cross-functional teams to develop and implement layout designs for digital circuits.
- Create and optimize layout designs using industry-standard EDA tools.
- Perform physical verification and design rule checks to ensure design integrity and manufacturability.
- Participate in design reviews and provide feedback to improve design quality.
- Work closely with circuit designers to understand design specifications and constraints.
- Contribute to the development and enhancement of layout design methodologies and best practices.
- Stay updated with the latest industry trends and advancements in standard cells layout design.
The Impact You Will Have :
What You ll Need :
Skills Required
Eda, Problem-solving
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Staff Engineer • Bengaluru / Bangalore
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