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Design Verification Engineer

Design Verification Engineer

Haysnagpur, maharashtra, in
18 hours ago
Job description

We are looking Verification engineer with 5-8 years experience to support our client in Bangalore.,

Pls share your resume if you have only available within Immediate to max 30 days notice.

Mention your notice period details : 30 days

Company : Hays (https : / / www.haysplc.com / ) – Payroll

Location; Bangalore

Role; Verification engineer

Payroll; Hays

Mode of Interview; 1st round virtual / 2nd F2F

Experience level; 5-8 years

Job Description

Experience : 5-8 years

Responsibilities :

  • Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI / DDRx / LPDDRx / AI accelerator integration verification in SoC RTL.
  • Your key responsibilities will include writing test plans, defining test methodologies, developing C based software tests, SystemVerilog / Verilog testbenches and tests, and debugging of test failures and issues.
  • Working with project management and leads on planning tasks, schedules, and reporting progress.
  • Collaborate with engineers from other teams including architecture, design, implementation, modelling, performance analysis, silicon validation, FPGA and board development.

Required Skills and Experience :

  • Proven understanding of digital hardware verification language Verilog / System Verilog HDL.
  • Experience in SoC verification using Embedded Low-level programming including C / C++ tests and assembly language (preferably ARM).
  • Experienced in SoC verification using UVM / OVM methodologies.
  • Experienced in one or more of various verification methodologies – UVM / OVM, formal, power aware verification, emulation.
  • Exposure to all stages of verification : requirements collection, creation of verification methodology plans, test plans, testbench implementation, test case development, documentation, and support.
  • Good problem-solving and debugging skills.
  • Knowledge of SoC Verification Flow and strategy.
  • Experience with ARM-based designs and / or ARM System Architectures, SoC Boot flow, Cache coherency.
  • Porting peripheral driver software for SoC tests.
  • Clock Domain Crossing verification.
  • Experienced in GLS, DFT / DFD.
  • Experienced in UPF Power Aware verification.
  • Automation experience with shell programming / scripting (e.g., Tcl, Perl, Python, etc.).

    • Note : This position is on Hays payroll.

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