Job Description - Signal Integrity (SI) Engineer and Signal & Power Integrity (SI / PI) Engineer – Bangalore.
Signal & Power Integrity (SI / PI) Engineer
- Should be 4+years of experience in Signal & Power Integrity Engineer to support high-speed interfaces (LPDDR6, PCIe Gen5, USB, MIPI, etc..), with responsibilities extending into power delivery network (PDN) analysis.
- Strong background in both signal and power integrity.
- Hands-on experience with SI tools
- Proficiency with PI extraction / simulation tools ie PowerSI, SIwave, AEDT, HSPICE or any equivalent
- Knowledge of DDR, PCIe, UCIe standards and PDN design best practices.
- Strong analytical and communication skills.
- All SI tasks described above (channel modelling, extractions, eye analysis).
- Perform power integrity extractions and simulations for high-speed interfaces.
- Model and analyze package / board PDN
- Define decoupling strategy and validate against system requirements and provide design guidelines balancing both SI and PI constraints.
Signal Integrity (SI) Engineer
Should be 4+years of experience in Signal Integrity Engineer to support high-speed interface development and validation. The engineer will work on state-of-the-art technologies such as LPDDR6, PCIe Gen5, USB3.2 Gen2, MIPI CSI, UFS 4.0, HDMI, ETH-10GB etc…Strong background in signal integrity for high-speed serial and memory interfaces.Hands-on experience with o HFSS or Clarity, Siwave or PowerSI, o SystemSI or ADS or AEDTFamiliarity with JEDEC / LPDDR5 / 6 and PCIe / UCIe standards.Strong problem-solving skills and ability to work across cross-functional teams.Perform channel modelling, extractions, and eye analysis for high-speed interfaces.Conduct pre- and post-layout simulations to ensure compliance with interface standards.Analyze crosstalk, reflections, jitter, and insertion / return loss.Collaborate with design, package, and PCB teams to optimize SI performance.Generate reports and recommendations to support design decisions.