PDK Development-Cadence Virtuoso - Join the Next-Gen AI Semiconductor Revolution

Role Overview :

We are seeking a highly skilled EDA Engineer with solid experience in Cadence Virtuoso environments and a deep understanding of OpenAccess databases, SKILL scripting, foundry PDK / CDK integration, and schematic / layout tool automation. This role will collaborate closely with AI / EDA development teams to build seamless design flows and robust automation for our AI-powered analog design platform.

Key Responsibilities :

• Develop, maintain, and optimize analog / mixed-signal IC design flows in Cadence Virtuoso and related EDA tools.
• Create, modify, and optimize SKILL scripts for automation of layout, schematic, verification, and design environment tasks.
• Manage Component Description Format (CDF) parameters and configurations for foundry PDK and CDK components / libraries.
• Work extensively with the OpenAccess (OA) database API (using C++, Python, Tcl) to read, write, and manipulate design data including schematic, layout, connectivity, and library information.
• Develop automation tools and workflows leveraging OpenAccess to integrate schematic and layout views, support PDK / CDK validation, and assist design data migration or QA.
• Integrate and validate foundry PDK / CDK devices, parameterized cells (pCells), symbols, DRC / LVS decks, and simulation models with EDA tools.
• Troubleshoot issues related to PDK integration, OA database consistency, schematic-layout synchronization, and environment setups.
• Document technical processes, create reusable automation scripts, and contribute to team best practices.
• Collaborate with AI and software teams to integrate EDA tools into AI co-pilot platform and support continuous improvement of design automation.

Required Skills & Experience :

Preferred Qualifications :

Write to rekha.cxc@careerxperts.com to get connected !