Greetings of the day!!!
This is regarding a Job opportunity with eInfochips as we are having a position of ASIC RTL DESIGN ENGINEERS
Experience- 5+ Years
Location- Bangalore, Ahmedabad
Job Description :
Experience in RTL design
Verilog / VHDL
Simulation tools, Modeslim / VCS etc.
Basic protocols, I2C, UART, PCIe, SPI etc.
Micro-Architecture experience is a plus
CDC / Lint tools
Timing analysys
CDC design
ISO26262 is plus
SOC integration
Interested candidates share resume at medha.gaur@einfochips.com
Asic Design Engineer • India