DFT Engineer

DFT Engineer

Location : Bangalore

Notice Period : 30 days

Job Description :

We are looking for a skilled

DFT Engineer

with 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.

Key Responsibilities :

Develop and implement DFT architecture including scan insertion, ATPG, MBIST, and boundary scan.

Work on RTL design modifications for DFT features.

Generate and validate test vectors using tools like Tetramax / Fastscan.

Run gate-level simulations and debug test coverage issues.

Perform pattern validation on emulation / silicon platforms.

Collaborate with RTL, PD, and validation teams for seamless DFT integration.

Required Skills :

Strong knowledge of DFT concepts : scan, compression, boundary scan, ATPG, BIST (LBIST / MBIST).

Experience with tools such as Synopsys DFT Compiler, Tetramax, Mentor Tessent.

Scripting skills in Python, Perl, or TCL for automation.

Familiarity with STA, synthesis, and timing constraints.

Good understanding of RTL-to-GDS flow.

Good to Have :

Exposure to automotive or high-reliability designs.

Experience with silicon bring-up and pattern debug.

About Company :

ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.