About Analog Devices
Analog Devices, Inc. (NASDAQ : ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible. Learn more at and on and .
Sr Engineer, Digital Design
Job Description
- Design key digital blocks such as clocks, reset paths, memory controller, NVMs etc. in Verilog / System Verilog with built-in configurability to allow Power / Performance / Area tradeoffs
- Develop strong understanding of ARM processor cores & subsystems (M series associated infrastructure such as caches, interconnect fabric, DMA, MMU, Coresight Debug & Trace, TZC) and their integration requirements
- Design for Test skills on SCAN, MBIST boundary scan, JTAG and ARM DAP interface and general functional DFT understanding.
- Experience of AFE based projects is an add on.
- Package Digital IP for seamless integration into design flow at different stages RTL / constraints / CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence etc.
- Consolidate & curate digital IP for SPI / I2C / UART / JTAG and other slow serial interfaces & peripherals
- ATPG vectors, MBIST and BSCAN post silicon debug support.
- Develop User Guides for RTL Integration, Synthesis, DFT, PnR, Programming Sequence, characterization etc.
Minimum Qualifications
Minimum B.E. / B.Techdegree in Electrical / Electronics / Computer science4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog and SystemVerilogStrong understanding of control path and data-path digital design concepts with an eye for realizing correct by construction solutionsExperience with specifying Design Verification (DV) requirements such as test plans, coverage metrics, and evaluate DV quality so as to realize robust design qualityKnowledge of Lint, CDC, formal equivalence, DFT concepts, power analysisExperience with developing timing constraints and ability to carry out logic synthesis and Static timing analysisGood interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographicallyUnderstanding of standard on-chip interfaces such as APB / AHB / AXI / Stream protocols is a strong plusKnowledge of Processor / SoC architecture and / or DSP fundamentals is a strong plusExperience with end-to-end ASIC / SoC product development & productization is very desirableExperience in IP integration (memories, IOs, embedded processors, hard macros, Analog IP)Knowledge of Microelectronics conceptsScripting skills in Python, Tcl, C etcAbility to collaborate and work directly with the tool vendors to resolve tools bugs, as well as implement the required improvementsGreat communication and teamwork skillsJob Req Type : Experienced
Required Travel : Yes, 10% of the time
Shift Type : 1st Shift / Days
Skills Required
MBIST, Spi, C, Uart, systemverilog, ATPG, Tcl, Verilog, I2c, Jtag, Scan, Python, Dft