Talent.com
This job offer is not available in your country.
RTL Physical Design Lead Engineer

RTL Physical Design Lead Engineer

Advanced Micro Devices, IncBengaluru, Karnataka, India
8 hours ago
Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE : Join AMD as we push the boundaries of what's possible in graphics and compute technology. We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP. This role involves transforming sophisticated RTL designs into robust and efficient physical layouts, critical to the performance of our next-generation graphics and compute solutions. THE PERSON : You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Key Responsibilities : Physical Design Implementation : Translate complex CDNA and RDNA graphics IP RTL designs into optimized physical layouts. Utilize industry-leading EDA tools for synthesis, place-and-route (PnR), and physical verification processes to take the design thru mock-taepout Performance Optimization : Focus on power, performance, and area (PPA) optimization to meet the stringent requirements of high-performance graphics and compute products. Collaborate with architecture and front-end design teams to align RTL design with physical constraints and objectives. Verification and Timing Closure : Conduct static timing analysis (STA) to ensure robust timing closure and sign-off for graphics IP. Implement and verify design rule checks (DRC), layout versus schematic checks (LVS), and power grid analysis tailored to CDNA and RDNA requirements. Collaboration and Communication : Work closely with cross-functional teams, including architects, RTL designers, and verification engineers to ensure seamless integration and functionality of graphics IP cores. Provide feedback and suggest improvements to design methodologies and processes to push the technology envelope further. Documentation and Reporting : Maintain comprehensive design documentation, methodologies, and updates. Prepare detailed reports on design progress, performance metrics, and any technical challenges encountered. PREFERRED EXPERIENCE : Domain Expertise : Experience with working on complex design and optimizing for performance, power, and area. Technical Proficiency : Proven track record in RTL synthesis, place-and-route (PnR), and static timing analysis (STA) for complex IP cores. Proficiency with industry-leading EDA tools, such as Synopsys Design Compiler, Cadence Innovus, and timing analysis tools like PrimeTime. Experience with low-power design methodologies and techniques for high-performance graphics IP. Design and Verification : Successful completion of full-chip sign-off, including design rule checks (DRC) and layout versus schematic (LVS) checks. Strong skills in signal integrity analysis, including crosstalk and IR drop evaluations. Process Technology : Experience working with advanced semiconductor process nodes (e.g., 7nm, 5nm, or below). Knowledge of process-related challenges and optimization techniques for graphics applications. Scripting and Automation : Proficiency in scripting languages such as Perl, Python, or TCL to automate design flows and improve efficiency. Experience developing and maintaining scripts for design rule checks and optimization processes. Problem-Solving and Innovation : Demonstrated ability to solve complex design challenges using innovative approaches. A track record of contributing to the improvement of design techniques and methodologies in a graphics-focused engineering team. ACADEMIC CREDENTIALS : Bachelors or Masters degree in computer engineering / Electrical Engineering #LI-NS1 Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.THE ROLE : Join AMD as we push the boundaries of what's possible in graphics and compute technology. We are seeking a talented RTL Physical Design Engineer to contribute to the development and optimization of our cutting-edge CDNA and RDNA graphics IP. This role involves transforming sophisticated RTL designs into robust and efficient physical layouts, critical to the performance of our next-generation graphics and compute solutions. THE PERSON : You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites / timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Key Responsibilities : Physical Design Implementation : Translate complex CDNA and RDNA graphics IP RTL designs into optimized physical layouts. Utilize industry-leading EDA tools for synthesis, place-and-route (PnR), and physical verification processes to take the design thru mock-taepout Performance Optimization : Focus on power, performance, and area (PPA) optimization to meet the stringent requirements of high-performance graphics and compute products. Collaborate with architecture and front-end design teams to align RTL design with physical constraints and objectives. Verification and Timing Closure : Conduct static timing analysis (STA) to ensure robust timing closure and sign-off for graphics IP. Implement and verify design rule checks (DRC), layout versus schematic checks (LVS), and power grid analysis tailored to CDNA and RDNA requirements. Collaboration and Communication : Work closely with cross-functional teams, including architects, RTL designers, and verification engineers to ensure seamless integration and functionality of graphics IP cores. Provide feedback and suggest improvements to design methodologies and processes to push the technology envelope further. Documentation and Reporting : Maintain comprehensive design documentation, methodologies, and updates. Prepare detailed reports on design progress, performance metrics, and any technical challenges encountered. PREFERRED EXPERIENCE : Domain Expertise : Experience with working on complex design and optimizing for performance, power, and area. Technical Proficiency : Proven track record in RTL synthesis, place-and-route (PnR), and static timing analysis (STA) for complex IP cores. Proficiency with industry-leading EDA tools, such as Synopsys Design Compiler, Cadence Innovus, and timing analysis tools like PrimeTime. Experience with low-power design methodologies and techniques for high-performance graphics IP. Design and Verification : Successful completion of full-chip sign-off, including design rule checks (DRC) and layout versus schematic (LVS) checks. Strong skills in signal integrity analysis, including crosstalk and IR drop evaluations. Process Technology : Experience working with advanced semiconductor process nodes (e.g., 7nm, 5nm, or below). Knowledge of process-related challenges and optimization techniques for graphics applications. Scripting and Automation : Proficiency in scripting languages such as Perl, Python, or TCL to automate design flows and improve efficiency. Experience developing and maintaining scripts for design rule checks and optimization processes. Problem-Solving and Innovation : Demonstrated ability to solve complex design challenges using innovative approaches. A track record of contributing to the improvement of design techniques and methodologies in a graphics-focused engineering team. ACADEMIC CREDENTIALS : Bachelors or Masters degree in computer engineering / Electrical Engineering #LI-NS1

Benefits offered are described : AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and / or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Create a job alert for this search

Rtl Design Engineer • Bengaluru, Karnataka, India

Related jobs
  • Promoted
Lead Physical Design Engineer

Lead Physical Design Engineer

L&T Technology ServicesBengaluru, Karnataka, India
LTTS is hiring for Physical Design Lead with 7+ years of experience on below JD : : .IP / Block level PnR activities from Netlist to GDS-II. Good knowledge of all PnR activities like Floor-planning, Pla...Show moreLast updated: 30+ days ago
  • Promoted
Physical Design Lead

Physical Design Lead

L&T Technology ServicesBengaluru, Karnataka, India
Hello Folks, we at LTTS are looking for Physical design Lead role with 8+ years of experience.Deatiled JD is below as mentioned. Candidates with PnR – 8+ ’ experience.IP / Block level PnR activities f...Show moreLast updated: 30+ days ago
  • Promoted
Senior Physical Design Engineer / Leads

Senior Physical Design Engineer / Leads

Eximietas DesignBengaluru, Karnataka, India
Eximietas Hiring Senior Physical Design Leads / Managers.Location : Bengaluru or Visakhapatnam.Typically requires a minimum of. Bachelors OR Masters Degree Engineering in Electronics or Electrical or T...Show moreLast updated: 30+ days ago
  • Promoted
Lead RTL Design Engineer

Lead RTL Design Engineer

ACL DigitalBengaluru, Karnataka, India
Experience Level : 10+ years of RTL design and development.Job Description : Silicon Design Engineer.Location : Hyderabad and Bangalore. Basic Job Deliverable : Silicon Design Engineer (RTL Design and De...Show moreLast updated: 30+ days ago
  • Promoted
  • New!
ASIC Physical design FCL Lead

ASIC Physical design FCL Lead

Advanced Micro Devices, IncBengaluru, Karnataka, India
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that ...Show moreLast updated: 4 hours ago
  • Promoted
Lead Physical Design Engineer

Lead Physical Design Engineer

Cadence System Design and AnalysisBengaluru, Karnataka, India
Work on challenging DDR PHY IP & Testchip Physical Design from Netlist-to-GDS in tech nodes below 7nm.Take ownership of one or more physical design blocks includes all of, floorplan, CTS, PNR, QRC,...Show moreLast updated: 7 days ago
  • Promoted
Senior Physical Design Engineer

Senior Physical Design Engineer

ACL DigitalBangalore Urban, Karnataka, India
PNR Leads Required with Shorter Notice period to lead a Team for a Long-Term Project.Experience with physical verification checks DRC, LVS, Antenna, ERC, PERC, ESD etc. Experience in PnR tools like ...Show moreLast updated: 30+ days ago
  • Promoted
Senior FPGA RTL Design Engineer

Senior FPGA RTL Design Engineer

Prodigy Technovations Pvt LtdBengaluru, Karnataka, India
Company Description Prodigy Technovations Pvt Ltd is a leading provider of advanced protocol validation solutions for testing and validating emerging and mainstream serial bus technologies in Syste...Show moreLast updated: 30+ days ago
  • Promoted
Lead Physical Designer 7+ Years

Lead Physical Designer 7+ Years

HCLTechbangalore, karnataka, in
HCLTech is seeking a skilled Physical Design Engineer for an exciting opportunity!.Timing analysis, timing convergence, SI / Noise analysis, and Signoff quality. Proficiency in multi-voltage scenarios...Show moreLast updated: 30+ days ago
  • Promoted
  • New!
RTL-Physical Design Lead

RTL-Physical Design Lead

Advanced Micro Devices, IncBengaluru, Karnataka, India
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that ...Show moreLast updated: 8 hours ago
  • Promoted
Physical Design Lead

Physical Design Lead

HCLTechBengaluru, Karnataka, India
Physical Design Lead (7-10 years’ experience) Company : HCL Tech Job Summary : We are looking for a highly motivated and experienced Physical Design Lead to join our dynamic team and play a vital r...Show moreLast updated: 27 days ago
  • Promoted
VLSI - Physical Design Lead Engineer

VLSI - Physical Design Lead Engineer

Eteros TechnologiesBengaluru, Karnataka, India
Company : Eteros Technologies India Private Limited.Semiconductor Engineering services startup, head quartered in the heart of the Silicon Valley, San Jose, CA, USA. Eteros Technologies India Pvt Ltd...Show moreLast updated: 30+ days ago
  • Promoted
Lead Physical Design Engineer

Lead Physical Design Engineer

ACL DigitalBengaluru, Karnataka, India
Semiconductors / ASIC / VLSI / SoC Design.We are seeking a highly experienced and technically strong.RTL-to-GDSII implementation for complex SoC or block-level designs. The ideal candidate will lead...Show moreLast updated: 30+ days ago
  • Promoted
Physical Design Engineer

Physical Design Engineer

ACL DigitalBengaluru, Karnataka, India
Experience with industry-standard physical design tools (Cadence, Synopsys, Mentor Graphics).Knowledge of advanced process nodes (7nm, 5nm, etc. Experience with scripting languages such as Python, T...Show moreLast updated: 30+ days ago
  • Promoted
Physical Design Engineer

Physical Design Engineer

LeadSoc Technologies Pvt LtdBengaluru, Karnataka, India
The Physical Design Engineer will be responsible for the full-chip and / or block-level physical implementation of complex digital, mixed-signal, or RF integrated circuits from.This role requires exp...Show moreLast updated: 6 days ago
  • Promoted
  • New!
Physical Design Lead

Physical Design Lead

Advanced Micro Devices, IncBengaluru, Karnataka, India
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that ...Show moreLast updated: 4 hours ago
  • Promoted
Senior Physical Design Lead Engineer

Senior Physical Design Lead Engineer

ACL DigitalBengaluru, Karnataka, India
Should be able to handle Full chip PnR (timing / congestion / CTS issues), understanding of IO ring, package support, multi voltage design. Deep understanding of the concepts related to synthesis, place...Show moreLast updated: 30+ days ago
  • Promoted
Fiori Technology Solutions - Lead Physical Design Engineer

Fiori Technology Solutions - Lead Physical Design Engineer

Fiori Technology Solutions IncBangalore
About the Role : We are seeking an experienced Lead Physical Design Engineer to take ownership of Place-and-Route (PNR) for complex flat SoC designs using Cadence flo...Show moreLast updated: 30+ days ago